The guys over at hackshed have been busy. [Carl] is making programmable logic design easy with an 8 part CPLD tutorial. (March 2018: Link dead. Try the Wayback Machine.) Programmable logic devices are ...

If you read my first post about a simple CPLD do-it-yourself project you may remember that I seriously wiffed when I made the footprint 1” wide, which was a bit too wide for common solderless ...

In a programmable logic world increasingly populated by FPGAs, is there still a place for the humble Complex Programmable Logic Devices (CPLD)? Well, the folks at Lattice Semiconductor certainly think ...

The MAX II CPLD family from Altera features an internal oscillator that dissipates much lower power than do external oscillators. The internal oscillator has an accuracy of only ±25%, sometimes ...

ISRâ„¢ Release 4.0 and Development Kit Support SVF and Chain-Independent STAPL Files For Embedded Programming Applications SAN JOSE, Calif., November 24, 2003 - Cypress Semiconductor Corporation (NYSE ...

SAN JOSE, Calif., January 29, 2003 - Xilinx, Inc., (NASDAQ:XLNX) today announced that 3DSP, a leading provider of configurable, scalable digital signal processor (DSP) architecture, used Xilinx chip ...

Designers of digital systems are familiar with implementing the 'leftovers' of their digital design by using FPGAs and CPLDs to glue together various processors, memories, and standard function ...

These programmable-logic devices combine CPLD flash configurability with an FPGA lookup-table architecture for lower-cost, logic-intensive designs. Applications traditionally supported by high-density ...

Altera has begun shipping the first member of its MAX II device family, the EPM1270. The device contains 1,270 logic elements, typically equivalent to 980 macrocells, said the firm, and 8kbit of ...

Lattice Semiconductor has announced version 1.3 of its ispLEVER Classic design tool suite which includes updated support for its CPLDs, including the ispMACH 4000 device family. The ispLEVER Classic 1 ...